WP1 - Optical Network on Chip

In WP1 (The design study for the optical network-on-chip or ONoC) we have completed the development of a reconfigurable ONoC model that can be used for analyzing the network at three hierarchical levels: system level, behavioral level, and physical level, built on a novel protocol stack architecture for the ONoC. The proposed model has been integrated successfully inside an industrial development environment (ST OCCS GenKit) using an industrial standard (VSTNoC) protocol. Such an environment allows to define a system and its interconnect placing and connecting the ONoC, configuring it according to the specific application, simulating and characterizing the whole system (and in particular the interconnect) in terms of performance metrics (latency, throughput).

Publications for Workpackage 1

conference publications

  • I. O’Connor, 'Optical networks on chip for MPSoC data communication', International Forum on Embedded MPSoC and Multicore (MPSoC), 28 June-2 July 2010, Gifu, Japan (published)
  • A. Allam, I. O’Connor, W. Heirman, 'Performance Evaluation for Passive-Type Optical Network-on-Chip', IEEE International Symposium on Rapid System Prototyping (RSP), June 8-11 2010, Fairfax (VA), USA (published)
  • A. Allam, I. O’Connor, A. Scandurra, 'Optical Network-on-Chip Reconfigurable Model for Multi-Level Analysis', ,\" International Symposium on Circuits and Systems (ISCAS), 30 May-2 June 2010, Paris, France (published)
  • A. Allam, I. O\\, 'Optical NOC Design-Parameters Exploration and Analysis', IEEE International Conference on Electronics, Circuits and Systems (ICECS), 13-16 December 2009, Hammamet, Tunisia (published)
  • I. OConnor, F. Mieyeville, F. Gaffiot, A. Scandurra, G. Nicolescu, 'Can integrated photonics solve MPSoC interconnect issues? (invited) ', Int. VLSI/ULSI Multilevel Interconnection Conference (published)
  • Alberto Scandurra, Ian OConnor, 'Scalable CMOS-compatible photonic routing topologies for versatile networks on chip ', NoCArc 2008, Como (Italy) (published)
  • Ian OConnor, Fabien Mieyeville, Frédéric Gaffiot, Alberto Scandurra, Gabriela Nicolescu, 'Reduction methods for adapting optical network on chip topologies to specific routing applications ', DCIS 2008, Grenoble, FR (published)

other publications

  • Alberto Scandurra, 'Photonic interconnect for System on Chip and System in Package applications', 16 Giugno 2011, ore 16:30 - Auditorium ST Catania site (ST internal seminar) (published)
  • Alberto Scandurra, 'La comunicazione nei sistemi VLSI : bus, NoC, NiP', June the 6st 2011 – University of Reggio Calabria (Italy) – Students, Ph.D. students – 20 - Italy (submitted)
  • Alberto Scandurra, 'Evoluzione dei sistemi di comunicazione integrati: bus, Network on Chip, Network in Package', June the 1st 2011 – University of Catania (Italy) – Students, Ph.D. students - 50 - Italy (published)
  • I OConnor, 'SPECIAL SESSION: On-Chip Optical Interconnect for Manycore Computing Architectures Lecture session C4L-A', Special workshop (published)

Deliverables for Workpackage 1

#TitleLeadDateStatusDissAbstrFile

D11

Architecture definition for OptoNoC

CNRS

M6

completed

RE

abstract

-

D12

OptoNoc design specifications for WP3-WP4-WP5

CNRS

M12

completed

RE

abstract

-

D13

Performance exploration and scalability analysis

CNRS

M24

completed

RE

abstract

-